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Module 10 — Memory Management Unit (MMU)

Learning Objectives

After completing this module, you will understand:

  • Why an MMU is required
  • Virtual Memory
  • Physical Memory
  • Virtual Address
  • Physical Address
  • Address Translation
  • Memory Protection
  • Process Isolation
  • Page Tables
  • TLB (Introduction)
  • Linux Memory Layout
  • ARM MMU
  • Embedded Systems with and without MMU

1. Why Do We Need an MMU?

Let's begin with a problem.

Suppose RAM is
8 GB

Two programs start.

Program A

int a = 10;

Compiler generates
Address = 0x1000

Program B

int x = 20;

Compiler also generates
Address = 0x1000

Problem
Both programs use
0x1000

Who owns that memory?
Without an MMU,
both would overwrite each other.
System crashes.

Without MMU

RAM
-------------------------
0x1000
Program A
-------------------------
Program B writes
0x1000
↓
Program A destroyed
-------------------------

No protection.

With MMU

Program A sees
0x1000

Program B also sees
0x1000

But
Internally
MMU translates them.

Program A
0x1000
↓
Physical
0x900000
Program B
0x1000
↓
Physical
0xD40000
-------------------------

Both programs think they own address 0x1000, but they actually use different physical memory.

Real-Life Analogy

Imagine an apartment building.
Every apartment has a
Kitchen

  • Apartment 101 Kitchen
  • Apartment 102 Kitchen
  • Apartment 103 Kitchen

Every apartment calls it
"Kitchen"
But physically
they're different rooms.

Virtual address
↓
Kitchen
Physical address
↓
Actual room

The MMU performs this mapping.

2. What is the MMU?

The MMU is dedicated hardware inside (or tightly integrated with) the CPU.

Responsibilities:

  • Virtual → Physical address translation
  • Memory protection
  • Access permission checking
  • Page table walking (or assisting with it)
  • Cache/TLB interaction

Diagram

CPU
↓
Virtual Address
↓
MMU
↓
Physical Address
↓
RAM

The CPU generally works with virtual addresses. The MMU translates them before memory is accessed.

3. Virtual Address

A Virtual Address is
the address used by a program.

Example

int a = 10;

Debugger
&a
0x1000

This is not necessarily the real RAM location.
It is virtual.

Physical Address

The actual location in RAM.

Example

Virtual
0x1000
↓
MMU
↓
Physical
0x90004000

CPU never exposes raw physical memory directly to user programs.

Visualization

Application
↓
Virtual Address
↓
MMU
↓
Physical Address
↓
RAM

4. Address Translation

Suppose CPU executes

x = y + z;

Needs
Virtual Address 0x400100

MMU checks translation

0x400100
↓
0xA300100

RAM access
0xA300100

CPU receives the data.
This translation happens automatically on every memory access in systems with an MMU.

5. Why Virtual Memory?

Suppose
Computer
16 GB RAM

Process A
Needs
4 GB

Process B
Needs
4 GB

Process C
Needs
2 GB

Every process wants memory beginning at
0x00000000

The MMU makes this possible.

Program A

Virtual
0x1000
↓
Physical
0x800000

Program B

Virtual
0x1000
↓
Physical
0xF30000

Same virtual address.
Different physical memory.

6. Process Isolation

One of the biggest advantages.

Suppose
Chrome crashes.

Without MMU

Chrome
↓
Writes
Wrong Address
↓
Windows crashes

With MMU

Chrome
↓
Only accesses
Own Memory
↓
Windows Safe

Every process has its own address space.

Diagram

Process A
0x1000
↓
MMU
↓
Physical
100000
Process B
0x1000
↓
MMU
↓
Physical
900000
--------------------

Completely isolated.

7. Memory Protection

Suppose
Program tries

*(0x00000000)=10;

MMU checks permissions.

No Permission
↓
Exception
↓
Segmentation Fault

This prevents applications from corrupting the OS or other processes.

8. Read / Write / Execute Permissions

Each memory region can have permissions.

Example

  • Read
  • Write
  • Execute

Examples

Memory Permissions
Code Read + Execute
Data Read + Write
Stack Read + Write
Kernel Code Kernel only

This supports security features such as preventing execution from writable data pages.

9. Linux Process Memory Layout

Typical process

High Address
------------------------
Kernel Space
------------------------
Shared Libraries
------------------------
Heap
↑
↓
Stack
------------------------
Program Code
------------------------
Low Address

We'll study this in much more detail during the virtual memory module.

10. Embedded Systems Without MMU

Many microcontrollers
do not have an MMU.

Example

ARM Cortex-M
Memory

Flash
SRAM
Peripherals

Application accesses
physical addresses directly.

Advantages

  • Simple
  • Fast
  • Low cost
  • Deterministic timing

Disadvantages

  • No virtual memory
  • No process isolation
  • Limited memory protection (though many Cortex-M devices include an MPU)

11. Embedded Systems With MMU

Application processors
ARM Cortex-A
Linux
Android
QNX
Windows

Need
MMU

Because

  • Multiple processes
  • Virtual memory
  • Shared libraries
  • Paging
  • Memory protection

12. ARM Example

Application
Virtual
0x400000
↓
MMU
Translation
↓
Physical
0xA040000

The CPU accesses physical memory only after translation.

13. Context Switching

Process A
Uses
Page Table A
↓
Scheduler
↓
Process B
Uses
Page Table B

The operating system switches the active page tables (or their root pointer) during a context switch so the MMU translates addresses for the correct process.

We'll revisit this in detail when studying page tables.

14. ADAS Example

Camera Driver
↓
DMA
↓
DDR Memory
↓
Application
↓
Virtual Address
↓
MMU
↓
Physical Address
↓
Image Processing

The driver may work with physical addresses for DMA, while user-space applications typically use virtual addresses mapped by the kernel.

Why Operating Systems Need MMU

Without MMU
No

  • Linux
  • Windows
  • Android
  • macOS
  • Process isolation
  • Virtual memory
  • Shared libraries
  • Memory protection
  • Demand paging

The MMU is one of the fundamental hardware features that enables modern multitasking operating systems.

Interview Questions

Beginner

  • What is the MMU?
  • Why do we need virtual memory?
  • Difference between virtual and physical addresses?
  • What is address translation?

Intermediate

  • Explain process isolation.
  • Explain memory protection.
  • Why does every process think it starts at address 0?
  • Why can't one process access another's memory?

Senior

  • Explain how the MMU translates addresses.
  • Why is the MMU required for Linux?
  • How does the OS switch between process address spaces?
  • Why do many microcontrollers not include an MMU?
  • Compare Cortex-M and Cortex-A memory management.

Common Mistakes

  • ❌ Thinking virtual addresses are stored in RAM. RAM stores data; virtual addresses are part of the CPU's memory access mechanism.
  • ❌ Assuming the MMU allocates memory. The operating system allocates memory; the MMU translates addresses and enforces permissions.
  • ❌ Believing physical addresses are visible to user applications. Normally they are not.
  • ❌ Thinking the MMU is optional for desktop operating systems. Modern desktop operating systems fundamentally depend on it.

Summary

The Memory Management Unit is specialized hardware that translates virtual addresses into physical addresses while enforcing memory protection. It enables every process to have its own private address space, preventing interference between programs and forming the foundation of modern operating systems such as Linux, Windows, Android, and macOS.

Mini Quiz

  1. Why do computers need an MMU?
  2. What is the difference between a virtual address and a physical address?
  3. How can two processes both use address 0x1000 safely?
  4. How does the MMU provide process isolation?
  5. Why does writing to an invalid address often produce a segmentation fault?
  6. Why do Cortex-M microcontrollers typically operate without an MMU?
  7. Why do Cortex-A processors require an MMU?
Knowledge Check

Concept Mastery Assessment — Module 10

Verify your conceptual understanding with 12 targeted technical assessment questions. Instant feedback and explanations are provided for every choice.

Question 1 of 12
What is the primary role of the Memory Management Unit (MMU) in modern computer systems?
Explanation
The MMU hardware intercepts virtual addresses emitted by CPU instructions, translates them to physical addresses via page tables, and checks permissions.
Question 2 of 12
Why do modern operating systems provide each process with its own private virtual address space?
Explanation
Virtual addressing isolates processes from each other and the kernel, preventing unauthorized memory access and simplifying linking/loading.
Question 3 of 12
What constitutes the boundary between the 'Page Number' and 'Page Offset' in a virtual address with 4 KB pages?
Explanation
Because 4 KB is 4096 bytes (2^12), the lowest 12 bits define the offset within the page. The upper bits identify the Virtual Page Number (VPN).
Question 4 of 12
What is the Translation Lookaside Buffer (TLB)?
Explanation
The TLB is an on-chip associative cache that retains recently resolved page table translations, avoiding slow multi-level memory page table walks.
Question 5 of 12
What happens when the MMU attempts an address translation and experiences a TLB miss?
Explanation
On a TLB miss, a page walk reads the hierarchical page tables in RAM, computes the physical frame address, inserts the translation into the TLB, and resumes.
Question 6 of 12
What hardware exception does the MMU generate if a user-space program attempts to write to a read-only memory page (e.g., code segment)?
Explanation
The MMU inspects permission bits (R/W, U/S). An unauthorized write triggers a page fault exception (#PF), which Linux handles by sending SIGSEGV.
Question 7 of 12
What is the purpose of the 'User/Supervisor' (U/S) bit in a Page Table Entry (PTE)?
Explanation
The U/S bit enforces hardware ring isolation: if set to 0, user-mode (Ring 3) instructions cannot access the page, protecting kernel data.
Question 8 of 12
What is 'Memory Protection' enforced by the MMU?
Explanation
Memory protection validates that each instruction's access type (Read, Write, Execute) matches the permissions configured in the page table entry.
Question 9 of 12
What is the 'NX' (No-Execute) or 'XD' (Execute-Disable) bit in modern x86/ARM page tables?
Explanation
The NX bit flags memory pages as non-executable. Any attempt to execute instructions from stack/heap pages triggers a page fault, blocking buffer-overflow exploits.
Question 10 of 12
What happens during a 'TLB Shootdown' in a multi-core processor environment?
Explanation
When an OS modifies a page mapping shared across multiple cores, it sends IPIs to invalidate (flush) the cached translation in all remote core TLBs.
Question 11 of 12
What is the standard base page size utilized in x86-64 and ARM64 general-purpose computing?
Explanation
The standard page granularity across x86-64 and standard Linux kernels is 4096 bytes (4 KB), balancing page table size with internal fragmentation.
Question 12 of 12
What are 'Huge Pages' (e.g., 2 MB or 1 GB pages) in Linux, and why do database and high-performance engines use them?
Explanation
Huge pages (2MB/1GB) allow a single TLB entry to cover orders of magnitude more memory, reducing TLB miss rates for memory-intensive applications.
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